Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to generate an address of a microroutine
Reexamination Certificate
2007-07-23
2011-10-11
Chan, Eddie P (Department: 2183)
Electrical computers and digital processing systems: processing
Instruction decoding
Decoding instruction to generate an address of a microroutine
C712S235000, C712S243000
Reexamination Certificate
active
08037285
ABSTRACT:
An instruction processing circuit includes a decoder circuit operable to receive a sequence of instructions and to decode the received sequence of instructions into a first type of sequence of operations, and a trace builder circuit operable to receive at least a portion of the sequence of operations of the first type and to generate, based thereon, a second type of sequence of operations, where the at least a portion of the sequence of operations of the first type represents a first portion of the sequence of instructions, where the first portion of the sequence of instructions includes at most one conditional control transfer instruction that, when present, ends the first portion of the sequence of instructions, and where the sequence of operations of the second type also represents the first portion of the sequence of instructions.
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Ashcraft Matthew William
Favor John Gregory
Radivojevic Ivan Pavle
Rowlands Joseph Byron
Shar Leonard Eric
Chan Eddie P
Lindlof John
Oracle America Inc.
Osha • Liang LLP
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