Timing analysis apparatus, timing analysis method, and...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000

Reexamination Certificate

active

07401308

ABSTRACT:
A timing analysis apparatus includes a data extracting unit that extracts objective circuit data concerning an objective circuit to become an objective of a timing analysis from layout data indicating circuits on a large-scale-integration chip; a time calculating unit that calculates a delay time of the objective circuit based on the objective circuit data; a parameter calculating unit that calculates a parameter indicating a size of an arrangement area of the objective circuit based on the objective circuit data; an information calculating unit that calculates variation information concerning a variation of the delay time; and a timing analyzing unit that performs the timing analysis of the objective circuit using the delay time and the variation information.

REFERENCES:
patent: 6654938 (2003-11-01), Kosugi
patent: 6687890 (2004-02-01), Sato
patent: 7181717 (2007-02-01), Singh et al.
patent: 2004/0054979 (2004-03-01), Bobba et al.
patent: 2004/0060022 (2004-03-01), Allen et al.
patent: 2006/0048085 (2006-03-01), Tyler et al.
patent: 2006/0059446 (2006-03-01), Chen et al.
patent: 2002-215710 (2002-08-01), None
patent: 2002-312410 (2002-10-01), None

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