Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1997-08-20
1999-11-02
Palys, Joseph E.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
713502, G06F 1100
Patent
active
059789395
ABSTRACT:
A timeout monitoring system including plural timeout value setting mechanisms, each of which sets a timeout value as a result of the start-up. Also included is plural timeout monitoring mechanisms, each of which do not start the timeout value setting mechanism at the following stage but stop it, when the timeout value set by the timeout value setting mechanism at the preceding stage is not set again even after a specific time has elapsed. A watchdog timer outputs an abnormality notice, when the timeout value set by the timeout value setting mechanism at the last stage is not set again even after a specific time has elapsed. Hierarchizing the software of the watchdog timer makes it possible to set a suitable timeout value in the watchdog timer for a higher-speed sensing of timeout and monitor the timeouts of plural systems at plural levels, which improves the monitoring capability.
REFERENCES:
patent: 5012435 (1991-04-01), Bailey et al.
patent: 5471564 (1995-11-01), Dennis et al.
patent: 5649098 (1997-07-01), Shieh et al.
patent: 5706425 (1998-01-01), Unekawa
patent: 5734641 (1998-03-01), Kawasaki et al.
Endo Kotaro
Hirokane Shigekazu
Mizoguchi Kenichi
Kabushiki Kaisha Toshiba
Nguyen Nguyen Xuan
Palys Joseph E.
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