Method for making Schottky diode having limited area self-aligne

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437162, 437233, H01L 21385

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active

046914358

ABSTRACT:
A method is disclosed for fabricating a small area, self aligned guard ring in a Schottky barrier diode. A vertically-walled hole is anisotropically etched completely through a dielectric layer on a silicon substrate. A layer of doped polycrystalline silicon is deposited over the apertured dielectric layer. The polycrystalline silicon is reactively ion etched away to leave only a lining about the perimeter of the hole in the dielectric layer. The structure is heated to diffuse the dopant from the lining into the substrate. Schottky diode metal is deposited on the substrate exposed through the lined aperture in the dielectric layer.

REFERENCES:
patent: 3907617 (1975-09-01), Zwernemann
patent: 4038107 (1977-07-01), Marr et al.
patent: 4063964 (1977-12-01), Peressini et al.
patent: 4209349 (1980-06-01), Ho et al.
patent: 4209350 (1980-06-01), Ho et al.
patent: 4256514 (1981-03-01), Pogge
patent: 4356623 (1982-11-01), Hunter
S. U. Kim, "A Very Small Schottky Barrier Diode (SBD) With Self-Aligned Guard Ring for VLSI Applications", Dec. 1979, IEEE Proceedings, p. 49.
N. G. Anantha et al., "Schottky Barrier Diode With Polycrystalline Silicon Guard Ring", Dec. 1978, IBM Technical Disclosure Bulletin, vol. 21, No. 7, p. 2752.

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