Through-via and method of forming

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C257SE23141, C257SE21495

Reexamination Certificate

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07923369

ABSTRACT:
In one embodiment, a method of forming a via includes forming an first opening in the semiconductor substrate, wherein the first opening has a bottom and sidewalls, forming a sacrificial fill in the first opening, forming a dielectric layer over the sacrificial fill, forming a second opening in the dielectric layer, wherein the second opening is over the sacrificial fill, removing the sacrificial fill from the first opening after forming the second opening, and forming a conductive material in the first opening and second opening.

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Koyanagi, M. et al.: “Three-Dimensional Integration Technology Based on Wafer Bonding With Vertical Buried Interconnections”; IEEE Transactions on Electron Devices; Nov. 2006; pp. 2799-2808; vol. 53, Issue 11; IEEE.
Non-Final office Action dated Aug. 5, 2010 in U.S. Appl. No. 12/277,455.

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