Three electrode dynamic semiconductor memory cell with coinciden

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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307238, 357 24, 365183, G11C 700, G11C 1134

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active

040927369

ABSTRACT:
A semiconductor random access memory is described in which the datum stored in one memory cell can be recalled without having to recall, temporarily store, and then re-enter the data stored in a column of memory cells. Datum can also be entered into one memory cell without having to recall and subsequently re-enter the data in a column of memory cells. During the recall and enter processes, only one of the normally off sense amps needs to be powered up. Compared to prior art one-transistor memories, this memory consumes less power and has a faster write cycle.

REFERENCES:
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patent: 3755793 (1973-08-01), Ho et al.
patent: 3935446 (1976-01-01), Michon
patent: 3997799 (1976-12-01), Baker
patent: 4000418 (1976-12-01), Waldron et al.
patent: 4015247 (1977-03-01), Baker
Baertsch et al., A New Surface Charge Analog Store, IEEE IEDM, Wash., D.C., Dec. 3, 1973, pp. 134-137.
Tiemann et al., A Surface-Charge Correlator, IEEE Journal of Solid State Circuits, vol. SC-9, No. 6, 12/74, pp. 403-410.

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