Three-dimensional silicon on oxide device isolation

Details Three-dimensional silicon on oxide device isolation Three-dimensional silicon on oxide device isolation

2011-05-03

2011-05-03

Ha, Nathan W (Department: 2814)

Semiconductor device manufacturing: process

Gettering of substrate

By implanting or irradiating

C257S347000

Reexamination Certificate

active

07935613

ABSTRACT:
A silicon-on-insulator wafer (10). The SOI wafer (10) comprises a top silicon layer (6), a silicon substrate (4), and an oxide insulator layer (2) disposed across the wafer (10) and between the silicon substrate (4) and the top silicon layer (6). The oxide insulator layer (2) has at least one of a contoured top surface (8a, 8b, 8c, 8d, 8e) and a contoured bottom surface (12e). Also provided are processes for manufacturing such a SOI wafer (10).

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