Three-dimensional non-volatile memory

Details Three-dimensional non-volatile memory Three-dimensional non-volatile memory

1999-06-16

2000-03-28

Chang, Joni

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438268, H01L 21336

Patent

active

060431229

ABSTRACT:
A strip of a semiconductor material (for example, P type silicon) is oxidized and the resulting strip of oxide is removed leaving a depression in the upper surface of the semiconductor material which has steep sidewalls. The steep sidewalls do not have significant ion impact damage because they are formed by oxidation and not by reactive ion etching of the semiconductor material. A high quality tunnel oxide can therefore be grown on the steep sidewalls. Floating gates are then formed on the tunnel oxide, corresponding word lines are formed over the floating gates, a conductive region (for example, N type silicon) is formed into the bottom of the depression, and a number of conductive regions (for example, N type silicon) corresponding with the floating gates are formed above the rim of the depression. The resulting bit transistors have channel regions which extend in a vertical dimension under floating gates along the surface of the sidewall. Because the depth and profile of the depression is determined primarily by oxidation and not by lithography, very small geometry bit transistors can be made.

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