Three dimensional contact or via structure with multiple sidewal

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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438625, 438627, 438633, H01L21/31;21/768

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active

059045590

ABSTRACT:
A process has been developed in which the contact area, between an overlying metal filled via structure, and an underlying metal interconnect structure, has been increased. The process features opening a via hole, in a dielectric layer, to an underlying metal interconnect structure, with the via hole being larger in width then the width of the underlying metal interconnect structure. Continued selective removal of the dielectric layer, in the via hole, results in exposure of the sides of the metal interconnect structure. Subsequent formation of an overlying metal filled via structure, in the via hole, results in an increase in contact area between the overlying metal filled via structure, and the narrow, metal interconnect structure.

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S. Wolf, Silicon Processing for the VLSI Era, vol. 2, Lattice Press, pp. 132, 246-249, 1990.

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