Thin film transistor with three dimensional multichannel structu

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257365, 257401, 257 66, 257364, H01L 2978

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active

053389590

ABSTRACT:
A thin film transistor gate structure with a three-dimensional multichannel structure is disclosed.
The thin film transistor gate structure according to the present invention comprises source/drain electrodes formed so as to be spaced from and opposite to each other on a substrate; semiconductive layers, comprised of a plurality of sub-semiconductive layers, each formed in a row, each end of the sub-semiconductive layers being in ohmic-contact with the source/drain electrodes; gate insulating layers surrounding each of the semiconductive layers; and gate electrodes surrounding each of the gate insulating layers.
Accordingly, the whole outerlayers of each sub-semiconductive layer surrounded by the gate electrodes serve as channel regions. As a result, the effective channel area increases, thereby improving the channel conductance and current driving ability.

REFERENCES:
patent: 4996574 (1991-02-01), Shirasaki
patent: 5140391 (1992-08-01), Hayashi et al.
Takashi Unagami, High-Voltage Poly-SI TFT'S with Multichannel Structure, IEEE Transactions on electron Devices, vol. 35, No. 12, Dec. 1988, pp. 2363-2366.
Akihiro Nitayama et al., Multi-Pillar Surrounding Gate Transistor (M-SGT) for Compact and High-Speed Circuits IEEE Transactions on Electronic Devices, vol. 38, No. 3, Mar. 1991, pp. 074P02-074P06.
Tanaka et al., Field-Induction-Drain (FID) Poly-SI TFTs with High On/Off Current Ratio, Extended Abstracts of the 22nd (1990 International) Conference on Solid State Devices and Materials Sendai, 1990, pp. 1011-1014.
S. S. Roth et al., Polysilicon Encapsulated Local Oxidation, IEEE Electron Device Letters, vol. 12, No. 3 Mar. 1991.

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