Thin film transistor substrate and manufacturing method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...

Reexamination Certificate

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C257SE29151, C349S043000

Reexamination Certificate

active

08044405

ABSTRACT:
A thin film transistor (TFT) substrate is provided in which a sufficiently large contact area between conductive materials is provided in a contact portion and a method of fabricating the TFT substrate. The TFT substrate includes a gate interconnection line formed on an insulating substrate, a gate insulating layer covering the gate interconnection line, a semiconductor layer arranged on the gate insulating layer, a data interconnection line including a data line, a source electrode and a drain electrode formed on the semiconductor layer, a first passivation layer formed on the data interconnection line and exposing the drain electrode, a second passivation layer formed on the first passivation film and a pixel electrode electrically connected to the drain electrode. An outer sidewall of the second passivation layer is positioned inside an outer sidewall of the first passivation layer.

REFERENCES:
patent: 2008/0042133 (2008-02-01), Chin et al.
patent: 2005-222732 (2005-08-01), None
patent: 10-1997-0030393 (1997-06-01), None
patent: 10-1999-0015670 (1999-03-01), None
patent: 10-1999-0048962 (1999-07-01), None
patent: 10-2001-0008892 (2001-02-01), None
patent: 10-2001-0011858 (2001-02-01), None
patent: 10-2001-0053873 (2001-07-01), None
patent: 10-2003-0042282 (2003-05-01), None
patent: 10-2006-0069173 (2006-06-01), None
patent: 10-2006-0072409 (2006-06-01), None
patent: 10-2006-0134470 (2006-12-01), None

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