Thin film transistor having double-layered gate electrode...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

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C438S582000, C438S656000, C257S388000, C257S412000

Reexamination Certificate

active

07629205

ABSTRACT:
A thin film transistor (TFT) that can prevent damage to a silicon layer under a gate electrode in an annealing process by using a first gate electrode having high thermal resistance and a second gate electrode having high reflectance and a method of manufacturing the TFT are provided. The method of manufacturing a TFT includes forming a double-layered gate electrode which includes a first gate electrode formed of a material having high thermal resistance and a second gate electrode formed of a metal having high optical reflectance on the first gate electrode, and forming a source and a drain by annealing doped regions on both sides of a silicon layer under the gate electrode by radiating a laser beam onto the entire upper surface of the silicon layer.

REFERENCES:
patent: 6255705 (2001-07-01), Zhang et al.
patent: 7119022 (2006-10-01), Uehara et al.
patent: 2002/0013021 (2002-01-01), Jeong et al.
patent: 2002/0142554 (2002-10-01), Nakajima
patent: 2003/0027382 (2003-02-01), Uehara et al.
patent: 2004/0183024 (2004-09-01), Choo et al.
patent: 2004/0224514 (2004-11-01), Uehara et al.
patent: 2005/0051773 (2005-03-01), Nakajima
patent: 2006/0145255 (2006-07-01), Jeong et al.
patent: 2002-026332 (2002-01-01), None
patent: 2002-0048487 (2002-06-01), None
Notice to Submit Response issued by the Japanese Patent Office on Sep. 22, 2006, in corresponding Japanese Patent Application No. 10-2005-0003192; and English translation thereof.

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