Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2011-07-19
2011-07-19
Vu, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C257S072000, C257S040000, C257SE33053, C257SE21414, C438S155000, C438S156000, C438S157000
Reexamination Certificate
active
07981737
ABSTRACT:
A thin film transistor array panel according to the present invention includes: a gate line formed on a substrate and including a gate electrode; a gate insulating layer formed on the gate electrode; a mold layer formed on the gate insulating layer and having an opening overlapping the gate electrode; a semiconductor layer filled in the opening; a data line formed on the mold layer and including a source electrode contacted with the semiconductor layer; a drain electrode contacted with the semiconductor layer on the mold layer and facing the source electrode; a passivation layer formed on the data line and the drain electrode; and a pixel electrode formed on the passivation layer and connected to the drain electrode, wherein the passivation layer, the source electrode, and the drain electrode have at least one through-hole connected to the opening.
REFERENCES:
patent: 5578513 (1996-11-01), Maegawa
patent: 2003/0085406 (2003-05-01), Cheng
patent: 2004/0041958 (2004-03-01), Hwang et al.
patent: 2004/0094766 (2004-05-01), Lee et al.
Bae Ju-Han
Kim Kyu-Young
Han Jonathan
Innovation Counsel LLP
Samsung Electronics Co,. Ltd.
Vu David
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