Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2008-05-13
2009-06-23
Pert, Evan (Department: 2826)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S157000, C257S072000, C257SE27111
Reexamination Certificate
active
07550329
ABSTRACT:
A thin film transistor array panel is provided, which includes: a substrate; a first signal line formed on the substrate; a second signal line formed on the substrate and intersecting the first signal line; a thin film transistor including a gate electrode connected to the first signal line and having an edge substantially parallel to the first signal line, a source electrode connected to the second signal line, and a drain electrode overlapping the edge of the gate electrode; and a pixel electrode connected to the drain electrode.
REFERENCES:
patent: 5777703 (1998-07-01), Nishikawa
patent: 2002/0190189 (2002-12-01), Tanimoto
patent: 2003/0117538 (2003-06-01), Lim et al.
patent: 2004/0007705 (2004-01-01), Song et al.
patent: 2004/0032759 (2004-02-01), Chow et al.
patent: 2005/0112790 (2005-05-01), Lan et al.
patent: 60-192369 (1985-09-01), None
patent: 02-285326 (1990-11-01), None
patent: 03-233431 (1991-10-01), None
patent: 06-067199 (1994-03-01), None
patent: 06-202158 (1994-07-01), None
patent: 2001-312069 (2001-11-01), None
patent: 2002-107758 (2002-04-01), None
patent: 2002-190605 (2002-07-01), None
patent: 2003-046089 (2003-02-01), None
patent: 1999-0013690 (1999-02-01), None
patent: 1019990032427 (1999-05-01), None
patent: 1020010057664 (2001-07-01), None
patent: 1020020043740 (2002-06-01), None
patent: 1020030009581 (2003-02-01), None
patent: 100391157 (2003-07-01), None
Choi Kwon-Young
Jeon Jae-Hong
Jun Sahng-Ik
Lee Jeong-Young
Haynes and Boone LLP
Pert Evan
Samsung Electronics Co,. Ltd.
Wilson Scott R
LandOfFree
Thin film transistor array panel and manufacturing method... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Thin film transistor array panel and manufacturing method..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Thin film transistor array panel and manufacturing method... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4120440