Thin film transistor array panel

Details Thin film transistor array panel Thin film transistor array panel

2007-05-29

2007-05-29

Huynh, Andy (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Non-single crystal, or recrystallized, semiconductor...

Amorphous semiconductor material

C257S072000, C257SE21657, C257SE27131

Reexamination Certificate

active

11008720

ABSTRACT:
A thin film array panel is provided, which includes: a gate line formed on a substrate; a first insulating layer formed on the gate line; a semiconductor layer formed on the gate insulating layer; a data line formed on the gate insulating layer and intersecting the gate line; a drain electrode formed at least on the semiconductor layer; a conductor arranged in parallel to the data line; a second insulating layer formed on the data line, the drain electrode, and the conductor and having a first contact hole exposing a portion of the drain electrode; and a pixel electrode formed on the second insulating layer, connected to the drain electrode through the first contact hole, fully covering the data line.

REFERENCES:
patent: 6590226 (2003-07-01), Kong et al.
patent: 6650390 (2003-11-01), Sakamoto et al.
patent: 6762802 (2004-07-01), Ono et al.
patent: 6798442 (2004-09-01), Kim et al.
patent: 6933989 (2005-08-01), Oke et al.
patent: 2005/0082492 (2005-04-01), Lin et al.

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