Thin film transistor and multilayer film structure and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

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Details

C438S479000, C438S517000, C257S066000, C257S347000, C349S043000, C349S044000, C349S046000, C349S047000

Reexamination Certificate

active

07037769

ABSTRACT:
The present invention is directed to a thin film transistor (and related multilayer structures) that includes: source and drain electrodes14and15disposed at a specified interval above an insulating substrate11and formed by printing-and-plating; an a-Si film16disposed for the source and drain electrodes14and15; a gate insulating film17laminated on the a-Si film16; and a gate electrode18laminated on the gate insulating film17and formed by printing-and-plating. The a-Si film16and the gate insulating film17have an offset region20that uniformly extends beyond the dimensions of the gate electrode18.

REFERENCES:
patent: 5512131 (1996-04-01), Kumar et al.
patent: 6043859 (2000-03-01), Maeda
patent: 6191530 (2001-02-01), Fukuta et al.
patent: 64-53501 (1989-03-01), None
patent: 64-54025 (1989-03-01), None
patent: 64-56939 (1989-03-01), None
patent: 64-57021 (1989-03-01), None
patent: 64-183775 (1989-07-01), None
patent: 64-184381 (1989-07-01), None
patent: 3-76083 (1991-04-01), None
patent: 3-76405 (1991-04-01), None

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