Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1999-11-04
2001-08-07
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S738000
Reexamination Certificate
active
06271077
ABSTRACT:
BACKGROUND OF THE INVENTION
Materials of high dielectric constants, such as SrTiO
3
, Pb(Zr,Ti)O
3
, etc. are expected to be used in the electronic field of semiconductor memories, etc.
For example, a usual DRAM comprises cells each including one transistor and one capacitor. For high integration, it is effective to reduce an area of the capacitors. To reduce the area of the capacitors, it is effective to use a film having a dielectric constant higher than the dielectric constants of silicon oxide film, ONO film (of the three-layer structure of silicon oxide film/silicon nitride film/silicon oxide film), or etc. This enables the device to be further micronized and more integrated.
The deposition of SrTiO
3
film, (Ba,Sr)TiO
3
, and Pb(Zr,Ti)O
3
films is usually conducted in an oxidizing atmosphere. Accordingly, the base electrode must be formed of a material which is hard to be oxidized or a material which can maintain conductivity even when oxidized. The conventional electrode is made of platinum (Pt), which is hard to be oxidized.
An upper electrode to be formed on the SrTiO
3
film or Pb(Zr,Ti)O
3
film must be formed also of an oxidation resistant material. Unless an oxidation resistant material is used, oxygen atoms contained in the SrTiO
3
film or Pb(Zr,Ti)O
3
film are absorbed by the upper electrode to adversely increase leak current flowing in the dielectric film.
In forming such capacitors on a silicon substrate, a diffusion preventive film of Ti film TiN film or others is provided between the silicon substrate and the Pt film as the lower electrode.
This is because in depositing the Pt film directly on the silicon substrate, silicon atoms in the silicon substrate are diffused in the Pt film and arrive at the surface of the Pt film in depositing the dielectric film, and a silicon oxide film is adversely formed on the interface between the dielectric film and the Pt film, and the formed capacitors have a decreased capacitance.
Thus, the capacitor devices formed of a high dielectric thin film are formed, reducing diffusion of silicon atoms from the silicon substrate.
Platinum film used as an electrode of a high dielectric constant material, such as SrTiO
3
(Ba,Sr)TiO
3
, or others, is deposited mainly by sputtering.
FIG. 45
shows one example of sputtering apparatuses. In a deposition chamber
384
a target
386
of platinum and a substrate
388
for a platinum film to be deposited on are opposed to each other. A direct current source
390
is connected to the target
386
and the substrate
388
, and a high negative voltage can be applied to the target
386
as the cathode. An Ar (argon) gas feed pipe
392
is connected to the deposition chamber
384
, and Ar gas as a sputtering gas can be fed into the deposition chamber
384
. A substrate holder
394
includes a heater
396
which heats the substrate
388
as required for the deposition.
Next, the method for depositing a platinum film by sputtering will be explained.
First, the pressure of the interior of the deposition chamber
384
is decreased by evacuation by a vacuum pump (not shown) through an exhaust port
398
, and then Ar gas is fed into the deposition chamber
384
through the Ar gas feed pipe
392
to establish a pressure in the deposition chamber
384
. For example, an Ar gas flow rate is set at 100 sccm to establish a pressure of 1-5×10
−3
Torr.
Then a direct voltage is applied between the substrate
388
and the target
386
to generate Ar plasma. Dissociated Ar ions collide on the target
386
as the cathode and sputter platinum atoms. The sputtered platinum atoms arrive at the substrate
388
and deposit a platinum film on the substrate
388
.
Thus a platinum film is deposited by sputtering.
As an electrode for high dielectric constant materials, such as SrTiO
3
, (Ba,Sr)TiO
3
, etc., iridium film or iridium oxide film other than platinum film are used.
Also in the conventional fabrication process for semiconductor devices, in which iridium film is deposited, sputtering is mainly used for the deposition of platinum film.
Recently Japanese Patent Laid-Open Publication No. 290789/1994 proposes a method for depositing iridium film by CVD using an organic compound of iridium.
Iridium film or iridium oxide film deposited by sputtering or CVD must be patterned in accordance with their applications, but because iridium film or iridium oxide film do not generate reactive products of high vapor pressures, it is difficult to use iridium film or iridium oxide film in a patterning method, such as RIE (Reactive Ion Etching), which uses reactions.
To pattern iridium film or iridium oxide film the so-called ion milling, by which a target is processed physically by collision of ions, is used.
Furthermore, as an electrode of high dielectric constant material, such as SrTiO
3
, (Ba,Sr)TiO
3
, etc., ruthenium film or ruthenium oxide film are used in some cases.
In the conventional fabrication processes for semiconductor devices, sputtering or CVD is mainly used in depositing ruthenium film or ruthenium oxide film. Especially CVD is recently noted because ruthenium film or ruthenium oxide film can be deposited in a uniform thickness on the tops and sides of the steps of stepped patterns.
For the deposition of ruthenium film or ruthenium oxide film by CVD, 2,3,6,6-Tetramethyl 3,5-heptanediene Ruthenium, hereinafter abbreviated as Ru(DPM)
3
, is used as a ruthenium source material.
Ru(DPM)
3
, is a pulverized solid at room temperature, and to be used for CVD, it must be vaporized. Ru(DPM)
3
is vaporized in the following procedure.
First, powder Ru(DPM)
3
is loaded in a vessel for low vapor pressure and is place in a thermostatic oven. Then, the interior of the thermostatic oven is heated up to the sublimation temperature of Ru(DPM)
3
to sublimate the Ru(DPM)
3
. Subsequently the sublimated Ru(DPM)
3
is bubbled by an inactive gas to be fed into the deposition chamber together with the inactive gas.
The gas thus fed into the deposition chamber is decomposed and reacted on a substrate which has been heated to about 300° C. and retained at 300° C., and ruthenium film is deposited on the substrate.
Ruthenium oxide film is deposited on the substrate to feed the sublimated Ru(DPM)
3
together with oxygen gas.
However, in the above-described conventional fabrication methods for capacitor devices, diffusion of silicon atoms can be prevented by a diffusion preventive film but in depositing the dielectric film oxygen atoms are diffused in the Pt film to arrive at the diffusion preventive film, oxidizing the diffusion preventive film
Such oxidation of the diffusion preventive film disenables contact between the Pt film and the silicon substrate, and devices directly below the capacitors cannot contact with them each other, with a result that high integration is impossible.
In a case that Pt film is used as the electrode, the Pt film cannot be patterned by RIE, and must be patterned by ion milling. Ion milling, however, is inferior to RIE in processing precision and throughput.
The thin film depositing method for depositing platinum film, iridium film or iridium oxide film or others by the above-described conventional sputtering has the problem of being unable to deposit platinum film on the tops and sides of the steps of a stepped pattern drawn on the substrate in a uniform thickness.
Accordingly, it is difficult to deposit a platinum film iridium film or iridium oxide film on complicated patterns, which makes it impossible to use platinum film, iridium film or iridium oxide film as electrodes of high dielectric constant materials of thin capacitor cells, or stacked capacitor cells of DRAMs (Dynamic Random Access Memory).
The iridium film deposited by the thin film depositing method described in Japanese Patent Laid-Open Publication No. 290789/1994 has much better covering on step-patterned substrates than that deposited by sputtering. In a case that iridium acetylacetate, for example, is used as a iridium source material, it is difficult to stably supply the gas, which causes a large disuniformity of thickness of
Nakabayashi Masaaki
Noshiro Hideyuki
Tamura Tetsuro
Armstrong Westerman Hattori McLeland & Naughton LLP
Dang Phuc T.
Fujitsu Limited
Nelms David
LandOfFree
Thin film deposition method, capacitor device and method for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Thin film deposition method, capacitor device and method for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Thin film deposition method, capacitor device and method for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2525625