Thermally enhanced package structure

Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices

Reexamination Certificate

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Details

C361S768000, C361S688000, C361S707000, C361S711000, C361S717000

Reexamination Certificate

active

08059422

ABSTRACT:
A manufacturing process for a thermally enhanced package is disclosed. First, a substrate strip including at least a substrate is provided. Next, at least a chip is disposed on an upper surface of the substrate, and the chip is electrically connected to the substrate. Then, a prepreg and a heat dissipating metal layer are provided, and the heat dissipating metal layer is disposed on a first surface of the prepreg and a second surface of the prepreg faces toward the chip. Finally, the prepreg covers the chip by laminating the prepreg and the substrate.

REFERENCES:
patent: 6400573 (2002-06-01), Mowatt et al.
patent: 7548430 (2009-06-01), Huemoeller et al.
patent: 2001/0027605 (2001-10-01), Nabemoto et al.
patent: 2001/0030059 (2001-10-01), Sugaya et al.
patent: 2005/0045369 (2005-03-01), Ishimaru et al.
patent: 2006/0087020 (2006-04-01), Hirano et al.
patent: 2007/0227761 (2007-10-01), Tuominen et al.
patent: 2008/0101044 (2008-05-01), Chang
patent: 2009/0129037 (2009-05-01), Yoshino

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