Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate
2000-05-15
2002-06-25
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
C257S796000
Reexamination Certificate
active
06410988
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to an encapsulated flip chip package and a method for making the same. More particularly, this invention relates to a flip chip package having a thermally conductive member that maintains flatness and provides good heat dissipation.
2. Description of Related Art
The general construction of a plastic encapsulated semi-conductor device, also known as a plastic ball grid array (PBGA) package, is a semi-conductor chip mounted on an upper surface of a laminate substrate with a plurality of solder balls attached to a lower surface of the laminate substrate that can be bonded to a circuit card. Traditionally, the most common PBGA package has been a semi-conductor chip that is electrically connected to electrical circuitry on the laminate substrate by conventional wire bonds or loop wire bonds. The semi-conductor device has an over-molded plastic resin body that protects the semi-conductor chip and the wire bonds, and this over-molded dielectric may be up to about 20 mils thick above the surface of the chip in order to adequately protect the wire loops. Consequently, the wire-bonded PBGA has a relatively high thermal resistance, and the low heat dissipation makes the wire-bonded package unsuitable for high power applications.
Flip-chip PBGAs have been subsequently introduced and, if encapsulated, are made thinner than wire-bonded PBGAs for better heat dissipation. Flip chip packages generally consist of semi-conductor chips that have terminations in the form of solder pads or bump contacts that are disposed on the surface of the chip that is adjacent to the laminate substrate. Flip-chip packages derive their name from the apparent flipping of the chip to yield a chip orientation that is upside down compared to that of the wire-bonded PBGAs. Since the solder bumps are connected to the circuitry of the laminate substrate, there is no need for large wire loops or the thick application of dielectric that surrounds them.
A flip-chip package, however, typically requires an underfill material to keep moisture away from solder interconnections and to reinforce the solder joints which are prone to fatigue. The underfill material encompasses the solder interconnections between the chip and the laminate substrate. In addition to the underfill, the flip chip package may have a body that surrounds the chip. If the body surrounds only the periphery of the chip then it does not add significant thermal resistance to the package because the surface of the chip, opposite the surface that is electrically connected to the laminate substrate, is often left exposed. Such a structure, and flip chip packages without a body, are known as “bare-chip”. While the bare-chip structure has enhanced thermal dissipation, dimensional stability is very difficult to control and warpage is a severe problem. The coefficient of thermal expansion (CTE) of the chip, for example a silicon chip, is about 3 ppm/° C. whereas the CTE of a composite laminate substrate is about 20 ppm/° C. During thermal cycling the chip restricts the expansion or contraction of the laminate substrate. The bending that is produced by thermal mismatch results in early fatigue failure of the ball grid array when the flip-chip package is attached to a circuit card or board. In severe cases the bending can cause fracture of the chip.
Flip-chip packages have also been made with a thermally-conductive covering, usually metal, to further improve heat transfer. The thermally-conductive covering is attached to the chip with a thermal coupler such as an adhesive, a thermal paste or a grease to improve the transfer of heat from the chip to the thermally conductive covering. A flip-chip package of this construction can have an additional problem since attachment of the thermally-conductive covering may result in delamination at the chip-to-covering interface. If the thermal coupler is substantially rigid the thermal coupler can fracture the chip, or if the thermal coupler is a non-rigid thermal grease, for example, it is prone to displacement during thermal cycling.
It is desirable to produce the flip-chip package that has low thermal resistance yet eliminates the need for a thermal coupler. It also desirable to produce a flip chip package that exhibits minimal warpage throughout the temperature range encountered in manufacture and in use to enhance ball grid array fatigue life.
SUMMARY OF THE INVENTION
The invention herein provides for a flip-chip package and a method of making a flip chip package that includes a thermally conductive member to dissipate heat while maintaining package flatness over a wide range of temperatures, and preferably from about minus 50° C. to about 150° C. The method of forming a flip-chip package comprises providing a laminate substrate having electrical circuitry disposed within; mounting a chip onto the laminate substrate and electrically connecting the electrical contacts on first or active surface of the chip to the circuitry of the laminate substrate; applying an underfill disposed between the chip and the laminate substrate; providing a thermally conductive member disposed adjacent to the surface of the chip that is opposite the first surface that contacts the underfill; and, applying a body to encapsulate the chip, wherein the body contacts the thermally conductive member, the chip and the laminate substrate as well as to any exposed portion of the underfill.
The body is preferably comprised of a material that, when cured, becomes sufficiently rigid to transmit force to the chip to counteract the force applied to the chip by the substrate. It is also preferred that the modulus and the CTE of the body are sufficient to put the periphery of the chip into compression in the direction normal to the first surface. The body, preferably an uncured dielectric material, is applied to the chip or to the substrate or to the thermally conductive member or combinations thereof. As the thermally conductive member and the chip are brought into contact with one another, the body is thereby extruded along the surface of the chip that is opposite the first surface and around the periphery of the chip, and thus encapsulates the chip.
The size of the thermally conductive member is selected according to the invention herein to prevent warpage and delamination of the overall flip chip package. The thermally conductive member is chosen such that the combination of its stiffness and its coefficient of thermal expansion (CTE) approximately balances the stiffness and CTE of the laminate substrate. Formulas for determining the size of the thermally conductive member are described herein. First, the thickness of the thermally conductive member is selected to approximately balance the stiffness and the CTE with the stiffness and CTE of the laminate substrate. Second, the length and width of the thermally conductive member may be varied considerably provided that these dimensions are at least as large and preferably at least three characteristic lengths larger than the corresponding width and length of the chip, where the “characteristic length” is defined herein as the height of the chip.
REFERENCES:
patent: 5396403 (1995-03-01), Patel
patent: 5450283 (1995-09-01), Lin et al.
patent: 5490324 (1996-02-01), Newman
patent: 5672548 (1997-09-01), Culnane et al.
patent: 5891753 (1999-04-01), Akram
Caletka David V.
Dery Jean
Duchesne Eric
Gaynes Michael A.
Johnson Eric A.
Hogg William N.
International Business Machines - Corporation
Nelms David
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