Thermal dissipation structures for FinFETs

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S173000, C438S508000

Reexamination Certificate

active

07387937

ABSTRACT:
A fin-type field effect transistor has an insulator layer above a substrate and a fin extending above the insulator layer. The fin has a channel region, and source and drain regions. A gate conductor is positioned over the channel region. The insulator layer includes a heat dissipating structural feature adjacent the fin, and a portion of the gate conductor contacts the heat dissipating structural feature. The heat dissipating structural feature can comprise a recess within the insulator layer or a thermal conductor extending through the insulator layer.

REFERENCES:
patent: 6642090 (2003-11-01), Fried et al.
patent: 6664582 (2003-12-01), Fried et al.
patent: 6885055 (2005-04-01), Lee
patent: 2003/0102497 (2003-06-01), Fried et al.
patent: 2003/0178670 (2003-09-01), Fried et al.
patent: 2003/0193058 (2003-10-01), Fried et al.
patent: 2003/0197194 (2003-10-01), Fried et al.
patent: 2004/0150029 (2004-08-01), Lee
patent: 2005/0242395 (2005-11-01), Chen et al.

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