Testing of integrated circuits using boundary scan

Details Testing of integrated circuits using boundary scan Testing of integrated circuits using boundary scan

2008-01-29

2009-12-08

Britt, Cynthia (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S741000, C716S030000

Reexamination Certificate

active

07631235

ABSTRACT:
Circuit testing equipment comprising a computer (110) having stored thereon a boundary scan description language (BSDL) file (111), a netlist (112) and a connections list (113). An adapter (105) connects the computer to a boundary scan bus of a circuit (120) to be tested. The computer is arranged to parse and compile the BSDL file, the netlist and the connections list to generate a data structure which, when combined with a test script (114), permits execution of the test script from the computer through the boundary scan bus. The test script can be IC-specific such that it is valid for a particular IC independent of the circuit in which the IC is located.

REFERENCES:
patent: 6539520 (2003-03-01), Tiong et al.
patent: 6757844 (2004-06-01), Lulla et al.
patent: 6988229 (2006-01-01), Folea, Jr.
IEEE Standard Test Access Port and Boundary-Scan Architecture IEEE Std 1149.1—2001.

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