Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2006-02-17
2010-06-22
Ellis, Kevin L (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S724000, C714S736000, C714S742000
Reexamination Certificate
active
07743304
ABSTRACT:
A test system for performing tests on devices under test (DUTs) includes a storage device storing test data for performing the tests on the DUTs, a shared processor for generating the test data, storing the test data in the storage device and generating a test control signal including one or more test instructions for executing the tests, and, for each DUT, a dedicated processor configured to receive a test control signal from the shared processor, and in response to the test control signal, transfer the test data for one of the test instructions to the DUT to execute that test instruction and verify the completion of that test instruction.
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De La Puente Edmundo
Volkerink Erik H.
Ellis Kevin L
Holland & Hart LLP
McMahon Daniel F
Verigy (Singapore Pte. Ltd.
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