Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2011-07-05
2011-07-05
Trimmings, John P (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S033000, C714S037000, C714S038110, C714S702000, C714S724000, C714S738000, C703S013000, C703S022000, C703S027000, C703S028000, C703S004000, C716S132000, C716S136000
Reexamination Certificate
active
07975198
ABSTRACT:
A test system for performing a test of a device is provided that comprises a source file of a test plan that describes a program for performing a test, and one or more of elements that are formed in a unit that divides the source file into one or more blocks. The test system further comprises an annotatable object that, when debugging of objects of the source file is performed, manages modification details of the debugging with reference to an element corresponding to a portion where the debugging is performed, and a controller that, after the debugging, rewrites the source file with details after the debugging is performed on an element basis based on the element and the annotatable object.
REFERENCES:
patent: 7069526 (2006-06-01), Schubert et al.
patent: 7209851 (2007-04-01), Singh et al.
patent: 7437614 (2008-10-01), Haswell et al.
patent: 7694249 (2010-04-01), Hamilton et al.
patent: 2002/0046364 (2002-04-01), Yoshimura
patent: 2009/0119542 (2009-05-01), Nagashima et al.
Advantest Corporation
Osha • Liang LLP
Trimmings John P
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