Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent
1998-10-20
2000-02-29
Nguyen, Hoa T.
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
714738, 714742, 714743, 714718, G01R 3128
Patent
active
060322810
ABSTRACT:
A test pattern generator for performing a block write function testing at high speed. The test pattern generator includes a data register which takes in data signal from a data generator by a first write signal from a control signal generator, an address selector which takes in specific bits from an address generated by an address generator, a mask data register file which takes the data signal in an area specified by a second write signal from the control signal generator, a write data register file which takes the data signal in an area specified by a third write signal from the control signal generator, and data formatter which outputs either an output data of the data register or of the data generator based on the above signals.
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patent: 4958345 (1990-09-01), Fujisaki
patent: 5453995 (1995-09-01), Behrens
patent: 5668816 (1997-09-01), Douskey et al.
patent: 5856985 (1999-01-01), Fujisaki
Advantest Corp.
Nguyen Hoa T.
LandOfFree
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