Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
1997-12-19
2001-05-15
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C365S185220
Reexamination Certificate
active
06233705
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a test method for testing the data storage characteristics of a memory such as a non-volatile memory, enabling secure detection of presence of a memory cell with defective memory storage ability.
2. Related Background Art
At first there will be explained, with reference to
FIGS. 4 through 8
, the conventional method for testing the data storage characteristics of a memory.
FIG. 4
is a flow chart of the test process for the data storage characteristics of a non-volatile memory
1
(hereinafter called a “memory cell”).
At first, in a step S
1
for writing all bit data into the memory, a gate voltage V
G
is elevated by a voltage elevation circuit applied to a gate terminal
2
of each memory cell
1
. In this state, a source terminal
3
is maintained at 0 V, while a drain terminal
4
is left open.
FIG. 8
shows a circuit for applying a voltage to the gate terminal
2
at the data writing. In this state, a rated voltage V
1
of the memory cell
1
is applied as the gate voltage V
G
to the gate terminal
2
, whereby a predetermined amount of negative charge (−) is accumulated in a floating gate
5
.
Then, in a step S
2
, each memory cell with the accumulated charge is left to stand in a high-temperature environment for a predetermined period. In this manner the loss of the charge, accumulated in the floating gate
5
shown in
FIG. 6
, is accelerated and the change in the charge amount in a prolonged period can be estimated.
Then a step S
3
executes the data read-out of the memory cell
1
at a voltage V
READ
.
FIG. 7
shows the state of the memory cell
1
at the data reading. The data reading is achieved by detecting the drain current I
D
at a drain terminal
4
.
FIG. 5
shows the change in the V
G
−I
D
characteristics before and after the high-temperature standing test, wherein a curve
10
indicates the behavior of the drain current I
D
under the application of the rated voltage V
1
at the gate voltage V
G
before the high-temperature standing test, while curves
11
,
12
indicates the drain currents I
D
after the test.
The curve
11
shows an example of the memory cell with good data storage characteristics. As the charge accumulated in the floating gate
5
is scarcely lost, this curve is not much displaced from the position of the curve
10
. Namely, this curve
11
, though showing a certain charge loss, provides a normal data as it is not lowered below the evaluation reference value V
READ
.
On the other hand, the curve
12
shows an example of the memory cell with defective data storage characteristics (defective memory cell). The curve is significantly displaced from the position of the curve
10
, because the loss of the accumulated charge exceeds a predetermined amount. Consequently, it is possible to discriminate whether the memory cell is satisfactory or defective, by evaluating the change of the drain current I
D
, utilizing the voltage V
READ
as the evaluation reference value.
However, in such conventional test method, as the data writing in the step S
1
is executed by the application of the rated voltage V
1
as the gate voltage V
G
to the gate terminal
2
, a large amount of charge is accumulated in the floating gate
5
of the memory cell
1
. With such large amount of accumulated charge, even if the position of the V
G
−I
D
characteristics curve is displaced, the threshold of the V
G
−I
D
characteristics may not move below the reference voltage V
READ
used for discriminating the data read-out in certain memory cells, so that the detection of the defective memory cells may become impossible.
Also if the high-temperature standing is extended until the curve of the V
G
−I
D
characteristics comes below the position of the voltage V
READ
in order to securely detect the defective memory cell, there is required a considerably long time, leading to a low work efficiency.
SUMMARY OF THE INVENTION
In consideration of the foregoing, the object of the present invention is to provide a test method for the data storage characteristics of the memory, capable of improving the efficiency of detecting a memory with defective data storage characteristics, thereby reducing the time required for the test and improving the work efficiency.
The above-mentioned object can be attained, according to an embodiment of the present invention, by a test method for the data storage characteristics of an electrically rewritable memory comprising:
a step A of writing test data into the memory by applying a voltage lower than the rated voltage;
a step B of executing a time-dependent deterioration test for the test data for a predetermined period, on the memory in which the test data are written; and
a step C of reading the test data from the memory after the test and investigating the storage characteristics of the test data.
REFERENCES:
patent: 5566386 (1996-09-01), Kumakura et al.
patent: 5652729 (1997-07-01), Iwata et al.
patent: 5696773 (1997-12-01), Miller
patent: 5732022 (1998-03-01), Kato et al.
patent: 5748544 (1998-05-01), Hashimoto
patent: 5835429 (1998-11-01), Schwarz
patent: 5844915 (1998-12-01), Saitoh et al.
patent: 5903505 (1999-05-01), Wik et al.
patent: 5909404 (1999-06-01), Schwarz
patent: 5910922 (1999-06-01), Huggins et al.
Canon Kabushiki Kaisha
De'cady Albert
Fitzpatrick ,Cella, Harper & Scinto
Lamarre Guy
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