Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2011-04-12
2011-04-12
Chung, Phung M (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S729000
Reexamination Certificate
active
07925941
ABSTRACT:
A scan technique using linear matrix to drive scan chains is used, along with an ATPG, to constraint scan test vectors to be generated through the linear matrix. The linear matrix scan technique reduces the test application time and the amount of test vector data by several orders of magnitude over conventional techniques, without reducing fault coverage.
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Cadence Design Systems Inc.
Chung Phung M
Vista IP Law Group LLP
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