Test circuit capable of sequentially performing boundary...

Details Test circuit capable of sequentially performing boundary... Test circuit capable of sequentially performing boundary...

2011-03-22

2011-03-22

Kerveros, James C (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

07913134

ABSTRACT:
A boundary scan test circuit is capable of sequentially performing a boundary scan test with respect to semiconductor integrated circuits bonded to both surfaces of a memory board. In order to reduce a boundary scan test time, the boundary scan test circuit includes a mirror function unit which transmits data signals of a first group pin or data signals of a second group pin corresponding to the first group pin according to a mirror function enable signal, and a boundary scan test unit which receives the data signals of the mirror function unit to perform a boundary scan test.

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