Test circuit and method for use in semiconductor memory device

Static information storage and retrieval – Read/write circuit – Testing

Reexamination Certificate

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C365S230030, C365S200000

Reexamination Certificate

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07961535

ABSTRACT:
A test circuit and method for use in a semiconductor memory device is provided. The test method for use in a semiconductor memory device including a plurality of memory blocks may include sequentially enabling a plurality of word lines by applying a stress to the wordlines and performing a test operation, in response to sequentially applied test addresses, each of the word lines being sequentially selected from the plurality of memory blocks and enabled.

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patent: 2004/0145933 (2004-07-01), Yamane
patent: 2006/0282718 (2006-12-01), Perry et al.
patent: 2006/0291308 (2006-12-01), Yusa
patent: 10-2007-000326 (2007-01-01), None

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