Test apparatus, test vector generate unit, test method,...

Details Test apparatus, test vector generate unit, test method,... Test apparatus, test vector generate unit, test method,...

2011-07-19

2011-07-19

Gaffin, Jeffrey A (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S741000, C714S724000, C703S015000, C703S014000, C365S201000

Reexamination Certificate

active

07984353

ABSTRACT:
Provided is a test apparatus that tests a device under test, including a vector expanding section that sequentially generates a plurality of test vectors; a vector selecting section that selects test vectors that cause a prescribed characteristic of the device under test, which is to be measured when test signals that are each based on one of the test vectors are supplied to the device under test, to fulfill a preset condition; and a judging section that judges pass/fail of the device under test based on measured values of the prescribed characteristic of the device under test supplied with the test signal based on the test vectors selected by the vector selecting section.

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Article Titled “IDDX-Based Test Methods: A Survey” jointly authored by Sagar S. Sabade et al. in ACM Transactions on Design Automation of Electronic Systems, Apr. 2004, vol. 9, No. 2 (pp. 159-198).

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