Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-07-09
2009-12-22
Kerveros, James C (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
Reexamination Certificate
active
07636877
ABSTRACT:
The test apparatus includes: a pattern memory that stores therein data to be outputted to the device under test; a device judgment section that judges whether the device under test passes or fails based on an output signal; the number of data information storage section that stores therein the number of data information based on the number of logic H data included in an input data; a counter that receives output data outputted from the pattern memory to the device under test and counts the number of logic H data included in the output data; a pattern memory judgment section that judges that the data stored in the pattern memory is correct when the number of data information on the input data is corresponding to the number of logic H data counted by the counter and outputs a signal according to this judgment result.
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Taiwanese Office Action for Application No. 09820408740, mailed on Jul. 6, 2009 (10 pages).
Advantest Corporation
Kerveros James C
Osha • Liang LLP
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