Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-02-14
2006-02-14
Thomas, Tom (Department: 2815)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S268000, C438S272000, C438S279000
Reexamination Certificate
active
06998315
ABSTRACT:
Embodiments of the present invention are directed to a termination structure provided for a trench DMOS device to reduce occurrence of current leakage resulting from electric field crowding at the border of the active area and a method of manufacturing the same. In one embodiment, the termination structure for the trench DMOS device comprises a substrate of a first type conductivity and an epitaxial layer of the first type conductivity over the substrate. The epitaxial layer has a lower doping concentration than the substrate. A body region of a second type conductivity is provided within the epitaxial layer. A trench extends through the body region between an active area and an edge of the substrate. A gate oxide layer lines the trench and extends to the upper surface of the body region between the trench and the active area. A passivation layer is formed on the gate oxide layer, including sidewalls and a bottom surface of the trench. A metal layer covers portions of the passivation layer on the side walls of the trench to expose a part of the passivation layer over the bottom surface of the trench.
REFERENCES:
patent: 5814895 (1998-09-01), Hirayama
patent: 5905283 (1999-05-01), Kasai
patent: 6309929 (2001-10-01), Hsu et al.
patent: 2003/0127702 (2003-07-01), Blair et al.
Chang Su-Wen
Chuang Chiao-Shun
Hsieh Hsin-Huang
Tseng Mao-Song
Landau Matthew C
Mosel Vitelic Inc.
Thomas Tom
Townsend and Townsend / and Crew LLP
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