Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2002-12-26
2004-02-03
Le, Vu A. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S189090, C365S211000, C327S158000
Reexamination Certificate
active
06687165
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates generally to buffer circuits and more particularly, to buffer circuits that compensate for ambient temperature changes.
BACKGROUND OF THE INVENTION
Integrated circuits are common in electronic products. Electronic products often are comprised of integrated circuits interfaced to each other via a data bus or other data paths. Interface specifications for various digital logic families delineate voltage and current levels required for digital signals to be transferred between two or more integrated circuits. Interface specifications are utilized by integrated circuits through the use of output buffer circuits to drive a logical low or logical high signal across a data path. In addition, output buffer circuits are a way of interfacing different digital logic families of integrated circuits.
Typically, output buffer circuits often use an external voltage level, Vcc, as a source of the logic high level. Depending on the design, Vcc can range from 3.0 to 5.5 volts. Output buffer circuits generally use a system ground (GND) as a sink for a logic low output. Output buffer circuits generally use two complementary transistor devices. The first device is a pchannel pull-up metal-oxide semiconductor (MOS) transistor, whose source is connected to Vcc, and whose drain is connected to the output terminal. The second device is an nchannel pull-down MOS transistor, whose drain is connected to the output terminal, and whose source is connected to ground.
Generally, a MOS device, when the drain source voltage is greater than or equal to the difference between the threshold voltage and the gate source voltage, is in the saturation region and acts like a constant current source. The MOS device is in the linear region and acts like a resistor when the drain source voltage is less than the difference between the threshold voltage and the gate source voltage.
Using the MOS device switching characteristics, an input data signal controls each device at its gate via control logic. To output a logic high signal, the first pull-up device is turned on by the control logic, and the first pull-down device is turned off. Output switching to this high state allows current to flow from Vcc to the output terminal via the first device and provides for a high impedance state via the second device so that no output signal current may flow through it to GND. In order to output a logic low signal, the first pull-up device is turned off, thus providing for a high impedance state between Vcc and the output terminal. In this low state, no current will flow from Vcc to the output terminal. Concurrently, the first pull-down device is turned on, thus allowing current to pass from the output terminal to GND. Thus, the output buffer circuit acts as a sink for current, and the output signal is a logic low signal. Therefore, the transition of the signal at the output terminal from one state to another state requires switching one of the devices on while switching the other device off. The gates of the first pull up and first pull down device are typically coupled to receive a data signal having a logic level adapted to activate one of the devices and to deactivate the other.
One example of an application of an output buffer is in a memory system. A memory system is commonly used in products such as digital cameras, personal digital assistants, and video game systems. A typical memory system is used to store commands or data that will be used in conjunction with a microprocessor. With the development of faster and faster microprocessors, memory systems must also keep pace. Fast transition times are a factor in the design of increasing circuit speed. This is particularly true with respect to memory systems. However, the fast transition times are affected by ambient temperature. In semiconductor devices, it is common for the output buffer stages to diminish in current drive capacity in response to increases in temperature. Such reductions in current drive capacity can translate into reduced operating speeds as signal transitions in the output signals will be slower. Therefore, the output buffer circuit is slower and thus, system speed is slower as well.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for alternative output buffer circuits and methods of their operation.
SUMMARY OF THE INVENTION
Various embodiments of the invention include apparatus and methods for providing increased drive capacity of an output buffer in response to changes in ambient temperature. This increased drive capacity is accomplished by selectively activating additional output buffer stages in response to increases in ambient temperature, and thus, increasing the current drive capacity of the output buffer.
For one embodiment, the invention provides an output buffer circuit. The output buffer circuit includes a first output buffer stage for providing an output signal indicative of a logic of a data signal and at least one second output buffer stage. Each second output buffer stage is adapted to selectively generate, in response to a temperature-dependent control signal, an output signal indicative of the logic of the data signal in parallel with the output signal of the first output buffer stage.
For another embodiment, the invention provides an output buffer circuit. The output buffer circuit includes an output driver for providing two control signals representative of a data signal, a first output buffer stage for providing an output signal indicative of the data signal in response to the two output driver control signals, at least one switch responsive to a temperature-dependent control signal and at least one second output buffer stage in parallel with the first output buffer stage. Each switch is adapted to pass the two output driver control signals when the temperature-dependent control signal has a first logic value and to pass two complementary control signals when the temperature-dependent control signal has a second logic value. Each second output buffer stage coupled to one of the switches in a one-to-one relationship for receiving its output control signals. Each second output buffer stage is adapted to provide an output signal indicative of the data signal when the temperature-dependent control signal has the first logic value and to present a high-impedance state when the temperature-dependent control signal has the second logic value.
For yet another embodiment, the invention provides a method of providing a data output signal. The method includes generating a first output signal at a first output buffer stage in response to a data signal, selectively activating a second output buffer stage to generate a second output signal in response to the data signal when an ambient temperature is greater than or equal to a predetermined threshold and adding the first output signal and the second output signal to generate the data output signal. The invention further provides apparatus and methods of varying scope.
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Le Vu A.
Leffert Jay & Polglaze P.A.
Micro)n Technology, Inc.
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