Techniques for reducing the rate of instruction issuance

Details Techniques for reducing the rate of instruction issuance Techniques for reducing the rate of instruction issuance

2006-03-28

2006-03-28

Chan, Eddie (Department: 2183)

Electrical computers and digital processing systems: processing

Processing control

Specialized instruction processing in support of testing,...

Reexamination Certificate

active

07020767

ABSTRACT:
A method and system in a multithreaded processor for processing events without interrupt notifications. In one aspect of the present invention, an operating system creates a thread to execute on a stream of the processor. During execution of the thread, the thread executes a loop that determines whether an event has occurred and, in response to determining whether an event has occurred, assigns a different thread to process the event so that multiple events can be processed in parallel and so that interrupts are not needed to signal that the event has occurred. Another aspect of the present invention provides a method and system for processing asynchronously occurring events without interrupt notifications. To achieve this processing, a first thread is executed to generate a notification that the event has occurred upon receipt of the asynchronously occurring event. A second thread is also executed that loops determining whether a notification has been generated and, in response to determining that a notification has been generated, performing the processing necessary for the event.

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