Techniques for providing early failure warning of a...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

Reexamination Certificate

active

07062685

ABSTRACT:
Techniques for monitoring the performance of a programmable circuit and to provide an early warning of a potential failure are provided. A processor monitors the performance of components on a programmable circuit over time. The processor stores performance characteristics for the components in memory. If the performance characteristics for particular components fall outside tolerance ranges, these components may to fail to operate according to specifications. Once the performance characteristics for particular components are outside the tolerance ranges, the processor sends out an alert signal. The alert signal indicates the possibility that the performance of the programmable circuit may violate the specifications in the future. The processor may repair the programmable circuit by re-routing around the problem components.

REFERENCES:
patent: 4899067 (1990-02-01), So et al.
patent: 5369314 (1994-11-01), Patel et al.
patent: 5434514 (1995-07-01), Cliff et al.
patent: 5592102 (1997-01-01), Lane et al.
patent: 5790479 (1998-08-01), Conn
patent: 5991898 (1999-11-01), Rajski et al.
patent: 6034536 (2000-03-01), McClintock et al.
patent: 6098032 (2000-08-01), Brookner
patent: 6107820 (2000-08-01), Jefferson et al.
patent: 6201404 (2001-03-01), Reddy et al.
patent: 6233205 (2001-05-01), Wells et al.
patent: 6249885 (2001-06-01), Johnson et al.
patent: 2002/0003742 (2002-01-01), Nguyen et al.
patent: 2003/0072185 (2003-04-01), Lane et al.
L. Zhao et al., “IDDQ Testing of Bridging Faults in Field Programmable Gate Arrays”, Internal Report, 1996.
Xilinx “Virtex-II Platform FPGAs: Detailed Description, Advance Product Specification,” DS031-2 (v2.1.1) Dec. 6, 2002.
Xilinx “Virtex-II Platform FPGAs: Introduction and Overview, Advance Product Specification,” DS031-1 (v1.9) Sep. 26, 2002; Xilinx “Virtex-II EasyPath FAQs” 4 pages total.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Techniques for providing early failure warning of a... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Techniques for providing early failure warning of a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Techniques for providing early failure warning of a... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3624191

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.