Techniques for forming contact holes through to a silicon...

Details Techniques for forming contact holes through to a silicon... Techniques for forming contact holes through to a silicon...

1998-09-01

2001-05-22

Kunemund, Robert (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S708000, C438S709000, C438S710000, C438S719000, C438S723000, C438S743000

Reexamination Certificate

active

06235640

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to the fabrication of semiconductor devices. More particularly, the present invention relates to improved techniques for forming contact holes through to a silicon layer of a substrate in a plasma processing chamber.
In the fabrication of semiconductor devices (e.g., integrated circuits or flat panel displays), contact holes, such as trenches, vias, and the like, may sometimes be formed through an oxide layer to a silicon layer of a substrate (e.g., a silicon wafer or a glass panel). It is known that such contact holes may be etched in a plasma processing chamber wherein a plasma that is capable of etching the oxide material through openings in a photoresist mask is utilized.
To facilitate discussion,
FIG. 1
depicts a simplified layer stack
100
, including a silicon layer
102
, oxide (i.e., SiO
2
or a material that contains SiO
2
) layer
104
and photoresist mask
106
. To simplify discussion, only some exemplary layers are shown. As is well known, however, other layers (including, for example, adhesion layer, seed layer, anti-reflective coating layer, or another layer) may also be disposed above, below, or in between the shown layers. Silicon layer
102
represents, in this example, a monocrystal silicon layer that may be disposed above a substrate or may even represent the monocrystal silicon substrate itself. In photoresist mask
106
, an exemplary opening
108
is shown through which the etching plasma may enter to remove material from oxide layer
104
to form the desired contact hole.
In
FIG. 2
, a contact hole
202
is shown formed through oxide layer
104
down to the interface between oxide layer
104
and silicon layer
102
. Typically, contact hole
202
is etched out of a plasma that is formed using a fluorocarbon-based etchant source gas. By way of example, suitable etchant source gases employed to etch the contact hole through oxide layer
104
may include CHF
3
or CHF
3
/C
4
F
8
. When energized, the fluorocarbon etchant source gas forms carbon species and fluorine species to etch the areas of oxide layer
104
that are not protected by photoresist mask
106
. By timing the etch or providing an endpoint, the etch may be stopped at about the interface between oxide layer
104
and silicon layer
102
.
It has been found, however, that the etching of contact hole
202
leaves a damaged region at the bottom of contact hole
202
. By way of example, the bottom of contact hole
202
may have a layer of amorphous silicon having adsorbed C, H, or F. In
FIG. 2
, this damaged region is shown as damaged region
204
at the bottom of contact hole
202
.
The presence of damaged region
204
unfortunately increases the contact resistance between the conductive material that is subsequently deposited into contact hole
202
and the contact region within silicon layer
102
(e.g., a doped well). The increased contact resistance reduces the electrical performance of the device formed on the substrate by, for example, reducing its operating speed or increasing its power consumption. If damaged region
204
is sufficiently thick, the contact resistance may be great enough to render the resultant device defective.
In the prior art, the contact resistance due to damaged region
204
may be reduced by removing some of damaged region
204
in a separate etch process known as a soft etch. The soft etch process, which is typically a separate etch step from the main contact etch that is employed to etch through oxide layer
104
, is typically performed using a gas mixture containing fluorocarbons.
Following the soft etch, another separate stripping step is employed to strip photoresist mask
106
, as well as adsorbed etch byproducts that are formed on interior surfaces of the plasma processing chamber during the main contact etch. The stripping step typically employs O
2
as the main etchant source gas. Alternatively, some prior art processes perform a separate stripping operation prior to performing the soft etch. In high density plasma processing chambers (i.e., those producing plasma with ion density greater than about 10
13
ions/cm
3
), the stripping and main contact etch operations are typically performed in the same plasma processing chamber to allow the chamber to be cleaned of the main contact etch byproducts while the photoresist mask is stripped.
The requirement of three separate processing steps to etch a contact hole through the oxide layer (i.e., a first main contact etch, a soft etch, and a stripping operation) has been found to be disadvantageous as these three separate processes tend to be time consuming. With the prior art technique, the throughput of substrates through the plasma processing chamber is relatively low, which disadvantageously increases the cost ownership of the etch tool. If these three separate processing steps are performed in different processing systems, additional costly equipments may be required, further driving up the cost of producing the semiconductor-based products.
In view of the foregoing, there are desired improved techniques for forming contact holes through to a silicon layer of a substrate in a plasma processing chamber.
SUMMARY OF THE INVENTION
The invention relates, in one embodiment, to a method for etching a contact hole through an oxide layer to a silicon layer of a substrate. The method includes providing the substrate, including the silicon layer and positioning the substrate within the plasma processing chamber. The method also includes performing a contact etch, which includes etching the contact hole through the oxide layer to the silicon layer. The contact etch employs a first plasma comprising carbon species and fluorine species. Thereafter, the method includes simultaneously stripping a photoresist mask that is provided above the oxide layer for the contact etch and soft etching a surface of the silicon layer at a bottom of the contact hole. This simultaneous stripping and soft etching is performed by flowing an etchant source gas comprising a fluorocarbon and O
2
into the plasma processing chamber, forming a second plasma from the etchant source gas, and employing the second plasma from the etchant source gas for the simultaneous stripping and soft etching.
The invention relates, in another embodiment, to a method for simultaneously stripping a photoresist mask employed for etching, in a low pressure, high density plasma processing chamber, a contact hole through an oxide layer to a silicon layer of a substrate and soft etching a surface of the silicon layer at a bottom of the contact hole. The technique of simultaneously stripping and soft etching is configured to substantially remove the photoresist mask and reduce the contact resistance at the bottom of the contact hole simultaneously. The method includes flowing an etchant source gas comprising a fluorocarbon and O
2
into the plasma processing chamber after the contact hole is formed but prior to filling the contact hole with a substantially conductive material. There is also included forming a plasma from the etchant source gas. Additionally, there is included employing the plasma for simultaneously stripping and soft etching for a predefined duration sufficient to lower a contact resistance between the silicon substrate and the substantially conductive material that is subsequently deposited into the contact hole to a predefined acceptable level.
These and other advantages of the present invention will become apparent upon reading the following detailed descriptions and studying the various figures of the drawings.


REFERENCES:
patent: 4902897 (1990-02-01), Iwamatsu
patent: 5372673 (1994-12-01), Stager et al.
patent: 5503901 (1996-04-01), Sakai et al.
patent: 5595627 (1997-01-01), Inazawa et al.
patent: 5670426 (1997-09-01), Kuo et al.
patent: 5681780 (1997-10-01), Mihara et al.
patent: 5683548 (1997-11-01), Hartig et al.
patent: 5843847 (2000-04-01), Pu et al.
patent: 6033990 (2000-03-01), Kishimoto et al.
patent: 6046114 (2000-04-01), Tohda
Patent Application No. 08/994,552 Filed Dec. 19, 1997 Ent

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