Data processing: measuring – calibrating – or testing – Testing system – Of circuit
Reexamination Certificate
2006-04-04
2006-04-04
Nghiem, Michael (Department: 2863)
Data processing: measuring, calibrating, or testing
Testing system
Of circuit
Reexamination Certificate
active
07024327
ABSTRACT:
Programmable circuits have a programmable interconnect structure that connects programmable circuit elements. Tests patterns can be automatically generated for the programmable circuit elements and interconnections on a programmable circuit. A connectivity graph represents programmable interconnections and functions as nodes. Tests routes are generated that connect the nodes in the connectivity graph between control points and observation points on the programmable circuit. The routes are grouped into configuration patterns that can be tested in one test cycle. Test vectors are then applied to the routes to determine if the interconnects and circuit functions are operable. Systems and methods of the present invention automatically create test patterns for a programmable circuit to reduce engineer time. The present invention also reduces test time and resources by increasing the number of interconnections and circuit elements tested in each configuration pattern.
REFERENCES:
patent: 4899067 (1990-02-01), So et al.
patent: 5369314 (1994-11-01), Patel et al.
patent: 5434514 (1995-07-01), Cliff et al.
patent: 5592102 (1997-01-01), Lane et al.
patent: 5633813 (1997-05-01), Srinivasan
patent: 5790479 (1998-08-01), Conn
patent: 5909450 (1999-06-01), Wright
patent: 5991898 (1999-11-01), Rajski et al.
patent: 6034536 (2000-03-01), McClintock et al.
patent: 6107820 (2000-08-01), Jefferson et al.
patent: 6112020 (2000-08-01), Wright
patent: 6201404 (2001-03-01), Reddy et al.
patent: 6233205 (2001-05-01), Wells et al.
patent: 2002/0003742 (2002-01-01), Nguyen et al.
patent: 2003/0072185 (2003-04-01), Lane et al.
Xilinx “Virtex-II Platform FPGAs: Detailed Description, Advance Product Specification,” DS031-2 (v2.1.1) Dec. 6, 2002.
Xilinx “Virtex-II Platform FPGAs: Introduction and Overview, Advance Product Specification,” DS031-1 (v1.9) Sep. 26, 2002; Xilinx “Virtex-II EasyPath FAQs” 4 pages total.
Dastidar Jayabrata Ghosh
Harms Michael
Nagarandal Ajay
Pang Hung Hing Anthony
Tracy Paul J.
Altera Corporation
Nghiem Michael
Townsend and Townsend / and Crew LLP
LandOfFree
Techniques for automatically generating tests for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Techniques for automatically generating tests for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Techniques for automatically generating tests for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3620932