Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-01-01
2008-01-01
Chaudhari, Chandra (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S595000, C438S938000, C257SE21640
Reexamination Certificate
active
11047129
ABSTRACT:
During the formation of a transistor element, sidewalls spacers are removed or at least partially etched back after ion implantation and silicidation, thereby rendering the mechanical coupling of a contact etch stop layer to the underlying drain and source regions more effective. Hence, the mechanical stress may be substantially induced by the contact etch step layer rather than by a combination of the spacer elements and the etch stop layer, thereby significantly facilitating the stress engineering in the channel region. By additionally performing a plasma treatment, different amounts of stress may be created in different transistor devices without unduly contributing to process complexity.
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patent: 7053400 (2006-05-01), Sun et al.
patent: 7164189 (2007-01-01), Huang et al.
patent: 2003/0040158 (2003-02-01), Saitoh
patent: 2004/0029323 (2004-02-01), Shimizu et al.
Shimizu, “Local Mechanical-Stress Control (LMC): A New Technique for CMOS-Performance Enhancement”, 2001 IEEE.
Aminpur Massud
Frohberg Kai
Klingler Roberto
Mazur Martin
Schaller Matthias
Chaudhari Chandra
Williams Morgan & Amerson P.C.
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