Tapered via using sidewall spacer reflow

Details Tapered via using sidewall spacer reflow Tapered via using sidewall spacer reflow

1997-07-10

1999-09-28

Niebling, John F.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438696, 438648, 438688, 438908, H01L 214763, H01L 21461

Patent

active

059603151

ABSTRACT:
A method of forming a tapered via includes steps of forming a via, coating the walls and bottom of the via with a reflow material, removing the reflow material from the bottom the via and causing the reflow material to become non-solid. Surface tension and other liquid forces cause the reflow material to form a tapered shape (i.e., be thicker at the bottom than the top). Therefore, with the invention, there is more control over the reflow process.

REFERENCES:
patent: 4755479 (1988-07-01), Miura
patent: 4948743 (1990-08-01), Ozaki
patent: 5117273 (1992-05-01), Stark et al.
patent: 5175122 (1992-12-01), Wang et al.
patent: 5234852 (1993-08-01), Liou
patent: 5308929 (1994-05-01), Tani et al.
patent: 5716869 (1998-02-01), Hibino et al.
patent: 5843842 (1998-12-01), Lee et al.

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