Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Patent
1995-10-19
1997-05-13
Quach, T. N.
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
438704, 438640, 438978, H01L 21311
Patent
active
056292376
ABSTRACT:
A method is described for forming tapered contact via holes in large scale integrated circuit structures which avoids the formation of a re-entrance profile. The re-entrance profile can form at the entrance to the contact via hole when a dry etch is used as a first etching step by redepositing material removed during the dry etch at the entrance of the contact via hole. This re-entrance profile makes the angle of entrance into the contact via hole greater than 90.degree. and the step coverage of metal filling the hole poor. This invention uses wet etching with a greater lateral etch rate than vertical etch rate as a first etching step in the formation of the contact via hole and avoids the formation of the re-entrance profile. The edges of the resulting contact via hole are smooth and the entrance angle into the contact via hole is substantially less than 90.degree.. The step coverage of metal later filling the contact via hole is substantially improved.
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Chang Hsien-Wen
Chou Kuei-Lung
Lin Jiunn-Jyi
Wang Pei-Jan
Prescott Larry J.
Quach T. N.
Saile George O.
Taiwan Semiconductor Manufacturing Company , Ltd.
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