Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – On insulating carrier other than a printed circuit board
Reexamination Certificate
2000-11-17
2003-02-11
Williams, Alexander O. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
On insulating carrier other than a printed circuit board
C257S666000, C257S673000, C257S698000, C257S772000, C257S779000, C257S766000, C257S780000, C257S786000, C257S767000, C257S762000, C257S690000, C257S692000, C257S693000
Reexamination Certificate
active
06518649
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The present invention relates to a tape carrier type semiconductor device in which a semiconductor chip having bumps formed therewith is mounted by bonding as well as relating to a fabrication method thereof and a liquid crystal module using the same, and in particular relates to a tape carrier type semiconductor device in which the bonded chip surface is covered by a tape substrate.
(2) Description of the Prior Art
Conventionally, semiconductor devices called COF (Chip On Film) in which semiconductor chips are mounted by bonding on a tape-like flexible interconnect substrate(tape carrier) have been known.
FIG. 1
is a sectional view showing a conventional COF configuration, which will be described next.
A COF
25
has a semiconductor chip
1
mounted by bonding to a tape carrier
26
, as described above. Formed on the obverse surface of semiconductor chip
1
are gold bumps
3
. Tape carrier
26
has a copper interconnect pattern
4
formed on a tape substrate
7
of polyimide or the like. Solder resists
10
are formed in part over tape substrate
7
and interconnect pattern
4
. Interconnect pattern
4
includes inner leads
14
to be bonded to gold bumps
3
of semiconductor chip
1
and outer leads
13
and element mounting patterns. Exposed parts of inner leads
14
, uncovered with solder resists
10
, are metalized by tin plating
8
while the element mounting patterns and outer leads
13
are metalized by gold plating
6
.
FIG. 2
is an enlarged view showing the joined part of semiconductor chip
1
and tape carrier
26
. As shown in
FIG. 2
, gold bump
3
is formed on an electrode
2
of semiconductor chip
1
. Tin plating
8
of inner lead
14
and gold bump
3
are bonded by formation of eutectic alloy
9
therefrom. The obverse face of semiconductor chip
1
is totally covered by tape substrate
7
with bumps
3
and inner leads
14
bonded. The bonded part of semiconductor chip
1
and tape carrier
26
is sealed with a resin
11
.
In fabrication of COF
25
, semiconductor chips
1
are provided and mounted on long tape carrier
26
at regular intervals along the longitudinal direction of the tape. The mounting method in this case is carried out by, as shown in
FIG. 2
, heating tin plating
8
of interconnect pattern
4
of tape carrier
26
and gold bump
3
of each electrode of semiconductor chip
1
, from the reverse face (opposite side of the bump forming surface) of semiconductor chip
1
whilst pressing tape carrier
26
, from the reverse face of interconnect pattern
4
, to bond them by formation of gold-tin eutectic alloy
9
, as stated above.
Connection of the chip to outer leads
13
is made by thermocompression bonding, mainly using ACF(anisotropic conductive film or adhesives) or by bonding with solder. To meet the user demand for gold plated connector connection specification, two separate plating treatments using two kinds of metals needed to be carried out, that is, the outer lead part alone needed to be gold plated in the second stage. The two separate plating fabrication process for tape carriers is carried out first by etching a copper foil tape carrier so as to form an interconnect pattern, applying solder resists, and tin plating. Then, part of interconnect pattern
4
(corresponding to inner leads
14
) to be bonded to semiconductor chip
1
is covered with masks for interconnect pattern protection to remove tin plating
8
from the exposed part. After the removal of tin plating
8
, the part is gold plated. After completion of the plating process, the masks for interconnect pattern protection is removed and the obtained carrier is inspected for shipment.
In the present situation of tape carrier fabrication, the specifications of the tape carrier, i.e., COF
25
, is custom made to deal with user's requests. COF
25
is mainly used for cellular phones, at present. As to joining methods of the outer leads, demands for contact-type connections such as spring connectors and elastomeric connectors increase in place of that for ACF bonding and solder bonding. For the contact type, the tin plating configuration of outer leads
13
in interconnect pattern
4
will cause a contact problem, so the outer leads are requested to be gold plated. To deal with such requests, tin plating
8
on tape carrier interconnect pattern
4
and gold bumps
3
on electrodes
2
of semiconductor chip
1
have been bonded by using a conventional bonding process, i.e., gold-tin eutectic alloy forming process, while outer leads
13
to be joined by connectors were alone gold plated using a two separate plating process using two kinds of metals. However, this process is not good enough since it needs 30 to 50% more cost for the fabrication, resulting in increase in price.
Further, pattern disconnection problems have also occurred during the tin plating process of interconnect pattern
4
of tape carrier
26
of COF
25
. That is, after etching copper foil tape carrier
26
to form an interconnect pattern
4
, part of interconnect pattern
4
other than the connecting portion is covered by solder resists
10
and the exposed part of the pattern is subjected to tin plating
8
. In this case, as shown in
FIG. 3
, during tin plating after deposition of solder resists
10
, interconnect pattern
4
is excised at the edge of the resist
10
deposition, producing hollowness
12
in interconnect pattern
4
(or causing interconnect pattern
4
to be thinned by excessive substitutional plating). This effect significantly affected the reliability and induced defects which lead to disconnection after some tens of cycles in the thermal cycling test. This drawback can be made up for by thickening the lines of interconnect pattern
4
, but this method needs a greater tape area for COF
25
, hence increases the cost, without providing any essential solution.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a tape carrier type semiconductor device which uses gold plating for the outer leads without raising its cost and can prevent occurrence of hollowness in the interconnect pattern therein and hence presents a high reliability, as well as providing a fabrication method thereof and a liquid crystal module using the device.
In order to achieve the above object, the present invention is configured as follows:
In accordance with the first aspect of the present invention, a tape carrier type semiconductor device includes: a semiconductor chip having connecting bumps formed on the obverse side thereof; and a tape carrier composed of a tape substrate and an interconnect pattern, including connecting inner leads, formed on a tape substrate, the obverse side of the semiconductor chip being totally covered by the tape substrate while the bumps and the inner leads are bonded to each other, and is characterized in that the bumps are made up of gold and the inner leads are gold plated so that the gold bumps and inner leads are thermally compression-bonded whereby the inner leads penetrate into corresponding gold bumps to create bonding.
In accordance with the second aspect of the present invention, the tape carrier type semiconductor device having the above first feature is characterized in that the inner leads are formed by plating nickel as an undercoating over the copper interconnections and subsequently plating gold over the nickel plating.
In accordance with the third aspect of the present invention, the tape carrier type semiconductor device having the above second feature is characterized in that the thickness of the nickel plating ranges from 0.1 to 1.0 &mgr;m and the thickness of the gold plating ranges from 0.05 to 3.0 &mgr;m.
In accordance with the fourth aspect of the present invention, the tape carrier type semiconductor device having the above first or second feature is characterized in that solder resists are formed in part on the tape carrier and the interconnect pattern other than that covered by the solder resists is gold plated.
In accordance with the fifth aspect of the present inv
Iwane Tomohiko
Toyosawa Kenji
Nixon & Vanderhye P.C.
Sharp Kabushiki Kaisha
Williams Alexander O.
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