Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate
2000-01-20
2002-04-23
Potter, Roy (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
C257S737000
Reexamination Certificate
active
06376916
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to a tape carrier for BGA (Ball Grid Array) and a semiconductor device using the same, and more particularly to a tape carrier adapted to a semiconductor chip having pads arranged along the central line thereof, a tape carrier for mounting a flip-chip, and a semiconductor device using the same.
BACKGROUND OF THE INVENTION
In these days, a small sized package (semiconductor device) called CSP (Chip Size Package) of BGA structure using a tape carrier which is easy for high density wiring has been proposed in accordance with the demands of small size of packages and mounting of semiconductor chips with high density. In this type of a package, a semiconductor device is structured by mounting a semiconductor chip having electrodes arranged along the central line thereof on a stress-relieving resin layer fixed on one surface of an insulating tape having an opening.
FIG. 1
shows a conventional tape carrier comprising insulating film
1
of polyimide, etc, having rectangular-shaped film opening
2
in the central portion thereof to be used for bonding, inner leads
4
extended into film opening
2
, patterned leads
3
and lands
5
for solder balls integrally formed with inner leads
4
. Insulating film
1
is provided with silicone resin elastmer layer
6
, on the side of forming leads
3
and solder ball lands
5
, for relieving thermal stress in mounting semiconductor chip (not shown), wherein elastmer layer
6
has elastmer layer opening
61
similar to film opening
2
.
FIG. 2
shows a cross-sectional structure of the conventional tape carrier along the line A—A′ in FIG.
1
.
FIGS. 3
to
5
show a conventional semiconductor device using the conventional tape carrier, wherein semiconductor chip
7
is mounted to be adhered to silicone resin elastmer layer
6
. Semiconductor chip
7
is provided with a plurality of electrodes
8
linearly arranged along the central line thereof, and electrodes
8
of semiconductor chip
7
and inner leads
4
of the tape carrier are electrically connected at the position of film opening
2
and elastmer layer opening
61
, wherein these electrically connected portions, and film and elastmer layer openings
2
and
61
are sealed by sealing resin
9
such as liquid epoxy resin, etc. Film and elastmer layer openings
2
and
61
serve a role for preventing injected liquid sealing resin
9
from being flowed out. Solder balls
10
are formed on solder ball lands
5
to be externally exposed and connected to an outer circuit (not shown).
Thus, the conventional semiconductor device is structured.
FIGS. 6A and 6B
show another conventional semiconductor device of &mgr;BGA type CSP (Trademark of Tessera in the USA) which has been increasingly used, wherein the demands of enhancing the connecting reliability in thermal cycle and lowering the manufacturing cost are realized in addition to the formerly described demands.
In the semiconductor device
200
shown in
FIGS. 6A and 6B
, semiconductor chip
30
is mounted via elastmer
70
on tape carrier
100
, so that electrodes of semiconductor chip
30
are electrically connected to leads of tape carrier
100
, and electrically connected portions of the electrodes and the leads are sealed by sealing resin
50
injected into resin-sealing openings
40
. In addition, solder balls
20
are arrayed on the side of tape carrier
100
opposite to the side on which semiconductor chip
30
is mounted.
FIG. 7
shows tape carrier
100
used for &mgr;BGA type CSP (semiconductor device)
200
. Tape carrier
100
comprises an insulating film such as polyimide, etc. having through-holes
21
for mounting solder balls
20
, and resin-sealing opening
40
for injecting sealing resin
50
to seal electrically connected portions of semiconductor chip
30
and leads
60
formed on the insulating film for connecting semiconductor chip
30
to solder balls
20
.
In the conventional tape carrier (
FIG. 1
) and the conventional semiconductor device (FIG.
3
), however, there are disadvantages in that voids occur inside sealing resin
9
, because air existing in a space between film opening
2
and elastmer layer opening
61
is trapped by sealing resin
9
such as liquid epoxy resin, etc, when sealing resin
9
is injected into film opening
2
and elastmer layer opening
61
, and that sufficient flatness of elastmer layer
6
such as silicone resin is not obtained, because such a method of using ordinary liquid resin to be printed and hardened is difficult to provide a flat surface. In addition, workability is difficult to be increased, because semiconductor chip
7
is adhered to elastmer layer
6
by using adhesive. Even worse, the separation occurs between semiconductor chip
7
and sealing resin
9
for the conventional semiconductor device (
FIG. 3
), because thermal stress which is generated under heat cycle, etc. at an interface between semiconductor chip
7
and sealing resin
9
in accordance with the difference of thermal expansion coefficients and stress which is caused by expansion of void
11
(
FIG. 5
) in sealing resin
9
, are concentrated to an edge portion of sealing resin
9
. The thermal stress causes the connected portions of inner leads
4
and electrodes
8
to be broken in a short period, thereby resulting in a defect in a circuit for the semiconductor device.
The conventional semiconductor device (
FIGS. 6A and 6B
) and the conventional tape carrier (Fig,
7
) also have a disadvantage in that sealing resin
50
is concave in the vicinity of the central portion thereof as shown by arrows B, because injected sealing resin
50
is pulled towards a peripheral wall of opening
40
in accordance with surface tensile force thereof. Therefore, it is difficult to provide sealing resin
50
with a flat surface. In addition, there is a disadvantage in that the resin-sealing portion is positioned on only one side, unless leads
60
are arranged symmetrically thereby resulting in the deterioration of structural balance for a semiconductor device, because sealing resin
50
is provided to seal only the connecting portions of leads
60
and electrodes of semiconductor chip
30
.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the invention to provide a tape carrier for BGA and a semiconductor device using the same in which no void occurs inside a sealing resin.
It is another object of the invention to provide a tape carrier for BGA and a semiconductor device using the same in which the influence caused by thermal stress of a semiconductor chip mounted on the tape carrier is relieved against the tape carrier and a sealing resin.
It is a further object of the invention to provide a tape carrier for BGA and a semiconductor device using the same in which a sealing resin is formed to be flat,
It is a still further object of the invention to provide a tape carrier for BGA and a semiconductor device using the same in which resin-sealing portions are formed to have structural balance.
According to the first feature of the invention, a tape carrier for BGA, comprises:
an insulating film having an opening for bonding in the middle thereof, a plurality of leads formed on the insulating film and projecting into the opening to provide a plurality of inner leads, and a plurality of lands connected with the plurality of leads, the plurality of leads and the plurality of lands being formed in a predetermined pattern, and
elastomer layers for relieving thermal stress, the elastmer layers being provided on one surface of the insulating film by means of an adhesive so as to be located on opposite sides of the opening, and separated around at least one end of the opening.
According to the second feature of the invention, a semiconductor device, comprises:
a semiconductor chip having a plurality of electrodes on one surface thereof;
a BGA tape carrier comprising an insulating film having an opening for bonding in the middle thereof, a plurality of leads formed on the insulating film and projecting into the opening to provide a plurality of inner leads, and a plurality of lands c
Hosono Masayuki
Kameyama Yasuharu
Okabe Norio
Hitachi Cable Ltd.
Potter Roy
Scully Scott Murphy & Presser
LandOfFree
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