Systems and methods for testing a device-under-test

Details Systems and methods for testing a device-under-test Systems and methods for testing a device-under-test

2006-12-05

2006-12-05

Le, Dieu-Minh (Department: 2114)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S733000

Reexamination Certificate

active

07146539

ABSTRACT:
A method for testing a device-under-test (DUT) includes examining a test data file that includes test data for testing the structure, functionality and/or performance of the DUT. The method also includes separating a first plurality of data units from a second plurality of data units contained in the test data file. The first plurality of data units correspond to a first plurality of DUT pins, and the second plurality of data units correspond to a second plurality of DUT pins.

REFERENCES:
patent: 6073264 (2000-06-01), Nelson et al.
patent: 6532561 (2003-03-01), Turnquist et al.
patent: 6651204 (2003-11-01), Rajsuman et al.
patent: 2002/0073374 (2002-06-01), Danialy et al.

Affiliated with

Also associated with

Rating

Systems and methods for testing a device-under-test does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Systems and methods for testing a device-under-test, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Systems and methods for testing a device-under-test will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3717852