System-on-chip embodying sleep mode by using retention...

Details System-on-chip embodying sleep mode by using retention... System-on-chip embodying sleep mode by using retention...

2007-09-28

2010-11-02

Cao, Chun (Department: 2115)

Electrical computers and digital processing systems: support

Computer power control

Power conservation

C713S320000

Reexamination Certificate

active

07827427

ABSTRACT:
A system-on-chip includes: a controller generating a first input/output control signal determining an input/output state in a normal mode, a second input/output control signal determining the input/output state in a sleep mode, a normal value, and a sleep value; stored in first through fourth registers; a first selector selecting the first or second input/output control signals depending on operation mode; an internal logic circuit operating in the normal mode and generating a signal to be transferred to an external chip based on the normal value; and a second selector selecting an output from the fourth register or the internal logic circuit depending on the operation mode; a power manager controlling the first and second selectors; and a retention input/output device storing outputs of the first and second selectors when the normal mode turns to the sleep mode, which are held when transitioning from the normal to sleep mode.

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