Electrical computers and digital processing systems: processing – Processing control – Specialized instruction processing in support of testing,...
Patent
1997-12-19
1999-09-21
Lee, Thomas C.
Electrical computers and digital processing systems: processing
Processing control
Specialized instruction processing in support of testing,...
712 23, 712 43, 712240, 712239, 712229, G06F 9312
Patent
active
059548142
ABSTRACT:
A microprocessor includes an instruction fetch unit, a branch prediction unit, and a decode unit. The instruction fetch unit is adapted to retrieve a plurality of program instructions. The program instructions include serialization initiating instructions and branch instructions. The branch prediction unit is adapted to generate branch predictions for the branch instructions, direct the instruction fetch unit to retrieve the program instructions in an order corresponding to the branch predictions, and redirect the instruction fetch unit based on a branch misprediction. The branch prediction unit is further adapted to store a redirect address corresponding to the branch misprediction. The decode unit is adapted to decode the program instructions into microcode. The microcode for each of the serialization initiating instructions includes microcode for writing a serialization address of the program instruction following the serialization initiating instruction in the branch prediction unit as the redirect address and triggering the branch misprediction.
REFERENCES:
patent: 5136696 (1992-08-01), Beckwith et al.
patent: 5136697 (1992-08-01), Johnson
patent: 5377336 (1994-12-01), Eickemeyer et al.
patent: 5553253 (1996-09-01), Pan et al.
Aatresh Deepak J.
Morrison Michael J.
Zaidi Nazar A.
Hart Jacob F.
Intel Corporation
Lee Thomas C.
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