System for testing a group of functionally independent...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment

Reexamination Certificate

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C714S718000, C714S733000

Reexamination Certificate

active

07085972

ABSTRACT:
System for testing a group of functionally independent memories (102) and for replacing failing memory words of the group of functionally independent memories (102) by redundant memory words, comprising: redundancy means108) including at least one array of redundant memory words (108a) and address registers (108b) connected to at least one array of redundant memory words (108a); a test means (114); a group of first multiplexers (110) following the test means (114) and preceding the memories (102) and the at least one array of redundant memory words (108a); and a group of second multiplexers (112) following the memories (102) and the at least one array of redundant memory words (108a), wherein each second multiplexer (112) is connectable to the test means (114).

REFERENCES:
patent: 5677883 (1997-10-01), Miwa
patent: 5734615 (1998-03-01), Dierke
patent: 5784321 (1998-07-01), Yamamura
patent: 5982684 (1999-11-01), Schwartzlow et al.
patent: 6198669 (2001-03-01), Iguchi
patent: 6256243 (2001-07-01), Savignac et al.
patent: 6385746 (2002-05-01), Tatsumi
patent: 6505313 (2003-01-01), Phan et al.
patent: 2001/0027546 (2001-10-01), Kouchi et al.
patent: 100 02 127 (2001-08-01), None
patent: WO 01/59790 (2001-08-01), None
Schober et al., “Memory Built-In Self-Repair using redundant words,” ITC International Test Conference, IEEE (Germany), p. 995-1001, (2001).

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