Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
2007-02-27
2007-02-27
Cao, Chun (Department: 2115)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
C710S061000, C327S141000
Reexamination Certificate
active
10655742
ABSTRACT:
Systems of and methods for processing data for communication between a sender and a receiver are described. In one embodiment, the phase of a first clock is used to select between first and second portions of data from the sender. The selected data is then synchronized, for communication to the receiver, to a second clock having a frequency which is an integer multiple of that of the first clock, wherein the integer multiple is two or more. The first and second portions of the data may be provided to the same output pins in this embodiment for communication to the receiver. In a second embodiment, first and second portions of data from the sender are clocked in using first and second edges, respectively, of a first clock. The first and second edges have a first polarity if a first pre-determined mode is in effect, and have a second polarity if a second pre-determined mode is in effect. Data derived from the clocked in data is then synchronized, for communication to the receiver, to a second clock. In a third embodiment, data from the sender is clocked in using a first clock. The clocked in data is then transformed responsive to a pre-determined mode selected from a plurality of possible modes. The transformed data is then synchronized, for communication to the receiver, to a second clock. In a fourth embodiment, a first clock is provided which is delayed relative to a second clock by a pre-determined amount. Data is then clocked out for communication to a receiver using the second clock, and clocked in for communication back to the sender using a third clock derived from the second clock. Data derived from the clocked in data is then synchronized to the first clock.
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Bhandari Nitin
Swenson Erik R.
Young Christopher J.
Cao Chun
Extreme Networks, Inc.
Howrey LLP
Weinman Sean
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