System for monitoring program flow utilizing fixwords stored seq

Electrical computers and digital processing systems: processing – Processing control – Specialized instruction processing in support of testing,...

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714 51, 714 52, G06F 1128

Patent

active

060444584

ABSTRACT:
A processing system includes a control flow monitor (CFM) checker for verifying a sequence of instructions performed by a pipelined processor (101). The CFM checker provides fail safe assurance against run-time errors in the sequence of instructions performed by a processor. The CFM checker verifies instruction sequence during run-time within 32 instruction cycles. The processing system provides an improved system and method having a CFM checker which minimizes wasted instruction cycles when performing branch instructions in a software program. Using a prefetch capability of an instruction pipeline and storing fixwords sequentially in memory, eliminates unnecessary instructions to fetch fixword values from external tables, thereby saving instructions and instruction cycles.

REFERENCES:
patent: 4074229 (1978-02-01), Prey
patent: 4108359 (1978-08-01), Proto
patent: 5339261 (1994-08-01), Adelson et al.
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An article entitled "R2 Response To X2 Tasking, Automatic Control Flow Monitor For The ARM Processor: Task 1--Cost/Benefit Analysis" by Elizabeth C. Ward Jun. 24, 1996 from Office of INFOSEC Research and Technology--INFOSEC Engineering Division.
An article entitled "Automatic Control Flow Monitoring (ACFM) For The ARM6: The Post Processor Report", Paul M. Johnson, Anthony C. Sheller, Elizabeth C. Ward from Internal Document, National Security Agency on Dec. 9, 1996.
An article entitled "Automatic Control Flowing Monitoring (ACFM) for the ARM6: Choosing The Best Polynomials" by Paul M. Johnson, Anthony C. Sheller, Elizabeth C. Ward from Internal Document, National Security Agency on Dec. 9, 1996.

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