System for in-line monitoring of photo processing in VLSI fabric

Optics: measuring and testing – By polarized light examination – With light attenuation

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Details

2504911, 25055937, 25055938, 257797, G01B 1114, G01J 100, G01N 2186, H01L 23544

Patent

active

059495472

ABSTRACT:
An integrated de-focus pattern provides an effective in-line monitor of de-focus and relative tilt for photo processing steps of integrated circuit wafers. The de-focus pattern is formed on an integrated circuit wafer in the vertical and horizontal spaces between integrated circuit chips. The de-focus pattern has a number of different test patterns at different heights above the wafer surface. De-focus patterns are placed across the entire wafer surface. The de-focus patterns are formed at the same time the features of the circuit chips are formed. The de-focus patterns can be analyzed optically or using a scanning electron microscope.

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