System for generating block address by replacing second count wi

Details System for generating block address by replacing second count wi System for generating block address by replacing second count wi

1997-10-09

2000-02-22

Lee, Thomas C.

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output addressing

371 471, 371 3701, G06F 1338, G06F 1100

Patent

active

060292083

ABSTRACT:
For serially transmitted block data that includes a sync signal, ID code, block address code, error correction code, and object data, a data receiving apparatus uses an input data reader that detects the sync signal, checks for parity errors and stores the block address, a sync signal generator that creates an effective sync signal in case the actual signal is not detected, and a block address output generator which provides the appropriate block address for data storage in memory. For data that includes only a sync signal and object data, a receiving apparatus uses a sync signal detector to detect the incoming sync signal, a sync signal generator to create an effective sync signal, a controller and sync signal selector to choose the appropriate signal, and block address and writing address counters to generate addresses for data storage in memory. In both implementations, the normal redundancy of the effective sync signals prevents data from being lost due to undetected sync signals and also minimizes unused memory storage areas in the case of discontinuous incoming block addresses (i.e. track jump). For serial data without a sync signal but having a predetermined number of bytes in every block, an apparatus uses a sync signal generator which detects the block dividing signal between data blocks, a latch signal generator and data latch which capture the transmitted data and convert it to parallel data, and an address generator which generates the memory storage addresses for the parallel data.

REFERENCES:
patent: 4525754 (1985-06-01), Handley
patent: 4532561 (1985-07-01), Kimura et al.
patent: 4796243 (1989-01-01), Kato
patent: 4819090 (1989-04-01), Hikawa
patent: 4879731 (1989-11-01), Brush
patent: 5202890 (1993-04-01), Iketani et al.
patent: 5222001 (1993-06-01), Tokumatsu et al.
patent: 5228041 (1993-07-01), Yoshino et al.
patent: 5761249 (1998-06-01), Ben-Efraim

Affiliated with

Also associated with

Rating

System for generating block address by replacing second count wi does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with System for generating block address by replacing second count wi, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System for generating block address by replacing second count wi will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-529531