System for controlling a tunable delay by transferring a...

Details System for controlling a tunable delay by transferring a... System for controlling a tunable delay by transferring a...

2006-07-04

2006-07-04

Cao, Chun (Department: 2115)

Electrical computers and digital processing systems: support

Synchronization of clock or timing signals, data, or pulses

Using delay

Reexamination Certificate

active

07073086

ABSTRACT:
The clock signal is the dominant source of electromagnetic interference (EMI) for many electronic devices. EMI generated by an electronic device must be suppressed to avoid interference with other electronic devices and to satisfy FCC regulations. EMI emissions are reduced by phase-modulating the clock signal using tunable delay lines. Phase modulation causes a spreading of the energy spectrum of the clock signal thereby reducing EMI emissions. Implementations of the tunable delay lines are provided. In one implementation, a tunable delay line includes a first pipeline, a second pipeline, and a coupling mechanism for coupling the first pipeline to the second pipeline at various transfer points. The forward latency of the second pipeline is longer than that of the first pipeline. Based on external control signals, a clock pulse traveling along the first pipeline can be transferred via the coupling mechanism to the second pipeline thereby allowing the clock pulse to continue to propagate along the second pipeline.

REFERENCES:
patent: 5036489 (1991-07-01), Theobald
patent: 6020939 (2000-02-01), Rindal et al.
patent: 6222407 (2001-04-01), Gregor
patent: 6453402 (2002-09-01), Jeddeloh

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